Design of a radiation-hardened sram cell using 16nm technology node
By: Rajat M.
Contributor(s): Ram Rathan K.R | Ranjithkumar N | Bellubbi, Ravi L | Jamuna S.
Publisher: Gurugram IOSR - International Organization of Scientific Research 2022Edition: Vol.12 Issue 3, May-Jun.Description: 08-15p.Subject(s): Computer Engineering In: IOSR journal of VLSI and signal processing (IOSR-JVSP)Summary: ABSTRACT: Electronic circuits are exposed to very high energy radiation in the harsh conditions of outer space. This leads to soft errors such as single-event upsets (SEU), double-event upsets (DEU) and single-event transients (SET). The memory circuits are the most susceptible to these soft errors resulting in severe data loss. This paper proposes the design for an SRAM cell that is radiation hardened by design (RHBD). A comparative study of the standard SRAM cell and the RHBD SRAM cell indicates that the proposed design is resilient to SEUs and DEUs. The proposed design is an improvement on the 8T SRAM cell design and includes a 20T triple interlocked cell (TICE) design. The error correction capabilities of both designs are compared by manually injecting bit upsets at crucial nodes in the circuit. It is observed that the TICE design provides a 96.75% and 98.5% improvement over......... Keywords— DEU; Radiation Hardening; RHBD; SET; SEU; DEU; SRAMItem type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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Articles Abstract Database | School of Engineering & Technology Archieval Section | Reference | Not for loan | 2022-1289 |
ABSTRACT: Electronic circuits are exposed to very high energy radiation in the harsh conditions of outer space. This leads to soft errors such as single-event upsets (SEU), double-event upsets (DEU) and single-event transients (SET). The memory circuits are the most susceptible to these soft errors resulting in severe data loss. This paper proposes the design for an SRAM cell that is radiation hardened by design (RHBD). A comparative study of the standard SRAM cell and the RHBD SRAM cell indicates that the proposed design is resilient to SEUs and DEUs. The proposed design is an improvement on the 8T SRAM cell design and includes a 20T triple interlocked cell (TICE) design. The error correction capabilities of both designs are compared by manually injecting bit upsets at crucial nodes in the circuit. It is observed that the TICE design provides a 96.75% and 98.5% improvement over.........
Keywords— DEU; Radiation Hardening; RHBD; SET; SEU; DEU; SRAM
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